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// biu_reg.h 1-9-2006
// gen_biu Ver 1.9 generated by luke
#define xd_p_reg_ep_rx_addr ( 0xDD80)
#define p_reg_ep_rx_addr 0xDD80
#define reg_ep_rx_addr_pos 2
#define reg_ep_rx_addr_len 6
#define reg_ep_rx_addr_lsb 0
#define xd_p_reg_ep0_tx_addr ( 0xDD81)
#define p_reg_ep0_tx_addr 0xDD81
#define reg_ep0_tx_addr_pos 2
#define reg_ep0_tx_addr_len 6
#define reg_ep0_tx_addr_lsb 0
#define xd_p_reg_ep1_tx_addr ( 0xDD82)
#define p_reg_ep1_tx_addr 0xDD82
#define reg_ep1_tx_addr_pos 2
#define reg_ep1_tx_addr_len 6
#define reg_ep1_tx_addr_lsb 0
#define xd_p_reg_ep3_tx_addr ( 0xDD83)
#define p_reg_ep3_tx_addr 0xDD83
#define reg_ep3_tx_addr_pos 2
#define reg_ep3_tx_addr_len 6
#define reg_ep3_tx_addr_lsb 0
#define xd_p_reg_ep_rx_len ( 0xDD84)
#define p_reg_ep_rx_len 0xDD84
#define reg_ep_rx_len_pos 0
#define reg_ep_rx_len_len 8
#define reg_ep_rx_len_lsb 0
#define xd_p_reg_ep0_tx_len ( 0xDD85)
#define p_reg_ep0_tx_len 0xDD85
#define reg_ep0_tx_len_pos 0
#define reg_ep0_tx_len_len 8
#define reg_ep0_tx_len_lsb 0
#define xd_p_reg_ep1_tx_len ( 0xDD86)
#define p_reg_ep1_tx_len 0xDD86
#define reg_ep1_tx_len_pos 0
#define reg_ep1_tx_len_len 8
#define reg_ep1_tx_len_lsb 0
#define xd_p_reg_ep3_tx_len ( 0xDD87)
#define p_reg_ep3_tx_len 0xDD87
#define reg_ep3_tx_len_pos 0
#define reg_ep3_tx_len_len 8
#define reg_ep3_tx_len_lsb 0
#define xd_p_reg_ep4_tx_len_7_0 ( 0xDD88)
#define p_reg_ep4_tx_len_7_0 0xDD88
#define reg_ep4_tx_len_7_0_pos 0
#define reg_ep4_tx_len_7_0_len 8
#define reg_ep4_tx_len_7_0_lsb 0
#define xd_p_reg_ep4_tx_len_15_8 ( 0xDD89)
#define p_reg_ep4_tx_len_15_8 0xDD89
#define reg_ep4_tx_len_15_8_pos 0
#define reg_ep4_tx_len_15_8_len 8
#define reg_ep4_tx_len_15_8_lsb 8
#define xd_p_reg_ep5_tx_len_7_0 ( 0xDD8A)
#define p_reg_ep5_tx_len_7_0 0xDD8A
#define reg_ep5_tx_len_7_0_pos 0
#define reg_ep5_tx_len_7_0_len 8
#define reg_ep5_tx_len_7_0_lsb 0
#define xd_p_reg_ep5_tx_len_15_8 ( 0xDD8B)
#define p_reg_ep5_tx_len_15_8 0xDD8B
#define reg_ep5_tx_len_15_8_pos 0
#define reg_ep5_tx_len_15_8_len 8
#define reg_ep5_tx_len_15_8_lsb 8
#define xd_p_reg_usb_reset_addr ( 0xDD8C)
#define p_reg_usb_reset_addr 0xDD8C
#define reg_usb_reset_addr_pos 0
#define reg_usb_reset_addr_len 7
#define reg_usb_reset_addr_lsb 0
#define xd_p_reg_usb_reset ( 0xDD8C)
#define p_reg_usb_reset 0xDD8C
#define reg_usb_reset_pos 7
#define reg_usb_reset_len 1
#define reg_usb_reset_lsb 0
#define xd_p_reg_usb_sync_in ( 0xDD8D)
#define p_reg_usb_sync_in 0xDD8D
#define reg_usb_sync_in_pos 0
#define reg_usb_sync_in_len 1
#define reg_usb_sync_in_lsb 0
#define xd_p_reg_usb_sync_txready ( 0xDD8D)
#define p_reg_usb_sync_txready 0xDD8D
#define reg_usb_sync_txready_pos 1
#define reg_usb_sync_txready_len 1
#define reg_usb_sync_txready_lsb 0
#define xd_p_reg_usb_clk_phase ( 0xDD93)
#define p_reg_usb_clk_phase 0xDD93
#define reg_usb_clk_phase_pos 0
#define reg_usb_clk_phase_len 2
#define reg_usb_clk_phase_lsb 0
#define xd_p_reg_usb_clk_sel ( 0xDD93)
#define p_reg_usb_clk_sel 0xDD93
#define reg_usb_clk_sel_pos 4
#define reg_usb_clk_sel_len 4
#define reg_usb_clk_sel_lsb 0
#define xd_p_reg_usb_fifo_ptr ( 0xDD94)
#define p_reg_usb_fifo_ptr 0xDD94
#define reg_usb_fifo_ptr_pos 0
#define reg_usb_fifo_ptr_len 3
#define reg_usb_fifo_ptr_lsb 0
#define xd_p_reg_usb_fifo_byte ( 0xDD94)
#define p_reg_usb_fifo_byte 0xDD94
#define reg_usb_fifo_byte_pos 3
#define reg_usb_fifo_byte_len 2
#define reg_usb_fifo_byte_lsb 0
#define xd_p_reg_usb_fifo_sys ( 0xDD94)
#define p_reg_usb_fifo_sys 0xDD94
#define reg_usb_fifo_sys_pos 5
#define reg_usb_fifo_sys_len 1
#define reg_usb_fifo_sys_lsb 0
#define xd_p_usbdma_utmi_a_ctl_i_7_0 ( 0xDDA0)
#define p_usbdma_utmi_a_ctl_i_7_0 0xDDA0
#define usbdma_utmi_a_ctl_i_7_0_pos 0
#define usbdma_utmi_a_ctl_i_7_0_len 8
#define usbdma_utmi_a_ctl_i_7_0_lsb 0
#define xd_p_usbdma_utmi_a_ctl_i_15_8 ( 0xDDA1)
#define p_usbdma_utmi_a_ctl_i_15_8 0xDDA1
#define usbdma_utmi_a_ctl_i_15_8_pos 0
#define usbdma_utmi_a_ctl_i_15_8_len 8
#define usbdma_utmi_a_ctl_i_15_8_lsb 8
#define xd_p_usbdma_utmi_a_ctl_i_23_16 ( 0xDDA2)
#define p_usbdma_utmi_a_ctl_i_23_16 0xDDA2
#define usbdma_utmi_a_ctl_i_23_16_pos 0
#define usbdma_utmi_a_ctl_i_23_16_len 8
#define usbdma_utmi_a_ctl_i_23_16_lsb 16
#define xd_p_usbdma_utmi_a_ctl_i_31_24 ( 0xDDA3)
#define p_usbdma_utmi_a_ctl_i_31_24 0xDDA3
#define usbdma_utmi_a_ctl_i_31_24_pos 0
#define usbdma_utmi_a_ctl_i_31_24_len 8
#define usbdma_utmi_a_ctl_i_31_24_lsb 24
#define xd_p_usbdma_utmi_a_ctl_i_39_32 ( 0xDDA4)
#define p_usbdma_utmi_a_ctl_i_39_32 0xDDA4
#define usbdma_utmi_a_ctl_i_39_32_pos 0
#define usbdma_utmi_a_ctl_i_39_32_len 8
#define usbdma_utmi_a_ctl_i_39_32_lsb 32
#define xd_p_usbdma_utmi_d_ctl_i_7_0 ( 0xDDA5)
#define p_usbdma_utmi_d_ctl_i_7_0 0xDDA5
#define usbdma_utmi_d_ctl_i_7_0_pos 0
#define usbdma_utmi_d_ctl_i_7_0_len 8
#define usbdma_utmi_d_ctl_i_7_0_lsb 0
#define xd_p_usbdma_utmi_d_ctl_i_10_8 ( 0xDDA6)
#define p_usbdma_utmi_d_ctl_i_10_8 0xDDA6
#define usbdma_utmi_d_ctl_i_10_8_pos 0
#define usbdma_utmi_d_ctl_i_10_8_len 3
#define usbdma_utmi_d_ctl_i_10_8_lsb 8
#define xd_p_usbdma_utmi_pwrmode ( 0xDDA6)
#define p_usbdma_utmi_pwrmode 0xDDA6
#define usbdma_utmi_pwrmode_pos 3
#define usbdma_utmi_pwrmode_len 1
#define usbdma_utmi_pwrmode_lsb 0
#define xd_p_usbdma_utmi_vbus_int_en ( 0xDDA7)
#define p_usbdma_utmi_vbus_int_en 0xDDA7
#define usbdma_utmi_vbus_int_en_pos 0
#define usbdma_utmi_vbus_int_en_len 1
#define usbdma_utmi_vbus_int_en_lsb 0
#define xd_p_usbdma_utmi_vbus_int_pol ( 0xDDA7)
#define p_usbdma_utmi_vbus_int_pol 0xDDA7
#define usbdma_utmi_vbus_int_pol_pos 1
#define usbdma_utmi_vbus_int_pol_len 1
#define usbdma_utmi_vbus_int_pol_lsb 0
#define xd_r_usbdma_utmi_vbus_int ( 0xDDA8)
#define r_usbdma_utmi_vbus_int 0xDDA8
#define usbdma_utmi_vbus_int_pos 0
#define usbdma_utmi_vbus_int_len 1
#define usbdma_utmi_vbus_int_lsb 0
#define xd_r_usbdma_utmi_vbus_status ( 0xDDA8)
#define r_usbdma_utmi_vbus_status 0xDDA8
#define usbdma_utmi_vbus_status_pos 1
#define usbdma_utmi_vbus_status_len 1
#define usbdma_utmi_vbus_status_lsb 0
#define xd_r_usbdma_utmi_clkrdy ( 0xDDA8)
#define r_usbdma_utmi_clkrdy 0xDDA8
#define usbdma_utmi_clkrdy_pos 2
#define usbdma_utmi_clkrdy_len 1
#define usbdma_utmi_clkrdy_lsb 0
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