Added multiprocessor stuff, converted references to BibTex

1 files changed, 34 insertions, 30 deletions

diff --git a/report/chapter6.tex b/report/chapter6.tex
index dd6a434..e2c6040 100644
--- a/report/chapter6.tex
+++ b/report/chapter6.tex
@@ -1,32 +1,36 @@
 \section{Literature}

 

-\small

-

-\begin{tabbing}

-

-\textbf{[1]} \= Jonathan Simonson, Janak H. Patel. Use of preferred preemption points in cache-based \\

-\> real-time systems. IEEE Computer Society Washington, DC, USA 1995 \\

-

-\\

-

-\textbf{[2]} \= Healy, C.A., Whalley, D.B., Harmon, M.G. Integrating the Timing Analysis of Pipelining \\

-\> and Instruction Caching. Dept. of Comput. Sci., Florida State Univ., Tallahassee, FL 1995 \\

-

-\\

-

-\textbf{[3]} \= Giorgio C. Buttazzo. Hard Real-Time Computing Systems, 2nd Revised edition \\

-

-\\

-

-\textbf{[4]} \= Sheayun Lee, Chang-Gun Lee, Minsuk Lee, Sang Lyul Min, Chong Sang Kim. Limited  \\

-\> preemptible scheduling to embrace cache memory in real-time systems. Dept. of Computer \\

-\> Engineering, Seoul National University and Hansung University Seoul, Korea 1998 \\

-

-\\

-

-\textbf{[5]} \= Jonathan Simonson, Janak H. Patel. Use of preferred preemption points in cache-based \\

-\> real-time systems. IEEE Computer Society Washington, DC, USA 1995 \\

-

-\\

-

-\end{tabbing}

+%\small

+%

+%\begin{tabbing}

+%

+%\textbf{[1]} \= Jonathan Simonson, Janak H. Patel. Use of preferred preemption points in cache-based \\

+%\> real-time systems. IEEE Computer Society Washington, DC, USA 1995 \\

+%

+%\\

+%

+%\textbf{[2]} \= Healy, C.A., Whalley, D.B., Harmon, M.G. Integrating the Timing Analysis of Pipelining \\

+%\> and Instruction Caching. Dept. of Comput. Sci., Florida State Univ., Tallahassee, FL 1995 \\

+%

+%\\

+%

+%\textbf{[3]} \= Giorgio C. Buttazzo. Hard Real-Time Computing Systems, 2nd Revised edition \\

+%

+%\\

+%

+%\textbf{[4]} \= Sheayun Lee, Chang-Gun Lee, Minsuk Lee, Sang Lyul Min, Chong Sang Kim. Limited  \\

+%\> preemptible scheduling to embrace cache memory in real-time systems. Dept. of Computer \\

+%\> Engineering, Seoul National University and Hansung University Seoul, Korea 1998 \\

+%

+%\\

+%

+%\textbf{[5]} \= Jonathan Simonson, Janak H. Patel. Use of preferred preemption points in cache-based \\

+%\> real-time systems. IEEE Computer Society Washington, DC, USA 1995 \\

+%

+%\\

+%

+%

+%\end{tabbing}

+

+\bibliographystyle{alpha}

+\bibliography{references}
\ No newline at end of file