1 files changed, 342 insertions, 5 deletions
diff --git a/Graphic_Equalizer/Graphic_Equalizer.hp b/Graphic_Equalizer/Graphic_Equalizer.hp
index 1d83fb2..cbf9307 100644
--- a/Graphic_Equalizer/Graphic_Equalizer.hp
+++ b/Graphic_Equalizer/Graphic_Equalizer.hp
@@ -8,6 +8,8 @@ configuration Full EDIF
 configuration Build_All EDIF
 configuration Buil_Partial EDIF
 configuration Shutdown_Releasebuild EDIF
+configuration RC203E_Full_Debug EDIF
+configuration RC203E_FastLoad_Debug EDIF
 setting Release debug false
 setting Release warnings true
 setting Release parfunc false
@@ -107,6 +109,18 @@ setting Release include:data true
 setting Release define:BUILD_ALL false
 setting Release define:HAVE_LOADER_ONLY false
 setting Release define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting Release piperam true
+setting Release retimer false
+setting Release device none
+setting Release package none
+setting Release speed none
+setting Release aluMapping false
+setting Release define:__EDIF__ true
+setting Release define:__VHDL__ false
+setting Release define:__VERILOG__ false
+setting Release include:..\\..\\project_cvs\\support_libs\\debug false
+setting Release "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Release "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Release "cd Release"
 command Release "call edifmake_rc200_optimized Graphic_Equalizer"
 output Release bin\\Graphic_Equalizer.bit
@@ -209,6 +223,18 @@ setting FastLoad_Debug include:data true
 setting FastLoad_Debug define:BUILD_ALL false
 setting FastLoad_Debug define:HAVE_LOADER_ONLY false
 setting FastLoad_Debug define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting FastLoad_Debug piperam true
+setting FastLoad_Debug retimer false
+setting FastLoad_Debug device none
+setting FastLoad_Debug package none
+setting FastLoad_Debug speed none
+setting FastLoad_Debug aluMapping false
+setting FastLoad_Debug define:__EDIF__ true
+setting FastLoad_Debug define:__VHDL__ false
+setting FastLoad_Debug define:__VERILOG__ false
+setting FastLoad_Debug include:..\\..\\project_cvs\\support_libs\\debug false
+setting FastLoad_Debug "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting FastLoad_Debug "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command FastLoad_Debug "cd FastLoad_Debug"
 command FastLoad_Debug "call edifmake_rc200_unoptimized Graphic_Equalizer"
 output FastLoad_Debug bin\\Graphic_Equalizer.bit
@@ -308,6 +334,21 @@ setting FastLoad define:USE_UNSIGNED_AUDIO false
 setting FastLoad include:..\\..\\Support_Libs\\debug false
 setting FastLoad define:_CONFIGURATION_HCH true
 setting FastLoad include:data true
+setting FastLoad piperam true
+setting FastLoad retimer false
+setting FastLoad device none
+setting FastLoad package none
+setting FastLoad speed none
+setting FastLoad aluMapping false
+setting FastLoad define:__EDIF__ true
+setting FastLoad define:__VHDL__ false
+setting FastLoad define:__VERILOG__ false
+setting FastLoad define:BUILD_ALL false
+setting FastLoad define:HAVE_LOADER_ONLY false
+setting FastLoad define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting FastLoad include:..\\..\\project_cvs\\support_libs\\debug false
+setting FastLoad "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting FastLoad "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command FastLoad "cd FastLoad"
 command FastLoad "call edifmake_rc200_unoptimized Graphic_Equalizer"
 output FastLoad bin\\Graphic_Equalizer.bit
@@ -334,14 +375,14 @@ setting Full_Debug netlistSimulator false
 setting Full_Debug useCustomBuild false
 setting Full_Debug exclude false
 setting Full_Debug target edif
-setting Full_Debug target.compile edif
+setting Full_Debug target.compile none
 setting Full_Debug family XilinxVirtexII
 setting Full_Debug family.lib none
 setting Full_Debug vTool Generic
-setting Full_Debug netExp speed
+setting Full_Debug netExp area
 setting Full_Debug outDir Full_Debug
 setting Full_Debug intDir Full_Debug
-setting Full_Debug part XC2V1000-4-FG456
+setting Full_Debug part xc2v1000fg456-4
 setting Full_Debug define:NDEBUG true
 setting Full_Debug define:USE_ true
 setting Full_Debug define:USE_RC200E true
@@ -410,6 +451,19 @@ setting Full_Debug include:data true
 setting Full_Debug define:BUILD_ALL false
 setting Full_Debug define:HAVE_LOADER_ONLY false
 setting Full_Debug define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting Full_Debug piperam true
+setting Full_Debug retimer false
+setting Full_Debug device xc2v1000
+setting Full_Debug package fg456
+setting Full_Debug speed 4
+setting Full_Debug aluMapping false
+setting Full_Debug define:__EDIF__ true
+setting Full_Debug define:__VHDL__ false
+setting Full_Debug define:__VERILOG__ false
+setting Full_Debug include:..\\..\\project_cvs\\support_libs\\debug false
+setting Full_Debug "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Full_Debug aluValue 40
+setting Full_Debug "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Full_Debug "cd Full_Debug"
 command Full_Debug "call edifmake_rc200_unoptimized Graphic_Equalizer"
 output Full_Debug bin\\Graphic_Equalizer.bit
@@ -512,6 +566,18 @@ setting Full include:data true
 setting Full define:BUILD_ALL false
 setting Full define:HAVE_LOADER_ONLY false
 setting Full define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting Full piperam true
+setting Full retimer false
+setting Full device none
+setting Full package none
+setting Full speed none
+setting Full aluMapping false
+setting Full define:__EDIF__ true
+setting Full define:__VHDL__ false
+setting Full define:__VERILOG__ false
+setting Full include:..\\..\\project_cvs\\support_libs\\debug false
+setting Full "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Full "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Full "cd Full"
 command Full "call edifmake_rc200_unoptimized Graphic_Equalizer"
 command Full "call shutdownnow.bat"
@@ -615,6 +681,18 @@ setting Build_All include:data true
 setting Build_All define:BUILD_ALL true
 setting Build_All define:HAVE_LOADER_ONLY false
 setting Build_All define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting Build_All piperam true
+setting Build_All retimer false
+setting Build_All device none
+setting Build_All package none
+setting Build_All speed none
+setting Build_All aluMapping false
+setting Build_All define:__EDIF__ true
+setting Build_All define:__VHDL__ false
+setting Build_All define:__VERILOG__ false
+setting Build_All include:..\\..\\project_cvs\\support_libs\\debug false
+setting Build_All "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Build_All "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Build_All "cd Build_All"
 command Build_All "call edifmake_rc200_optimized Graphic_Equalizer"
 output Build_All bin\\Graphic_Equalizer.bit
@@ -641,14 +719,14 @@ setting Buil_Partial netlistSimulator false
 setting Buil_Partial useCustomBuild false
 setting Buil_Partial exclude false
 setting Buil_Partial target edif
-setting Buil_Partial target.compile edif
+setting Buil_Partial target.compile none
 setting Buil_Partial family XilinxVirtexII
 setting Buil_Partial family.lib none
 setting Buil_Partial vTool Generic
 setting Buil_Partial netExp speed
 setting Buil_Partial outDir Build_Partial
 setting Buil_Partial intDir Build_Partial
-setting Buil_Partial part XC2V1000-4-FG456
+setting Buil_Partial part xc2v1000fg456-4
 setting Buil_Partial define:NDEBUG true
 setting Buil_Partial define:USE_ true
 setting Buil_Partial define:USE_RC200E true
@@ -717,6 +795,18 @@ setting Buil_Partial include:data true
 setting Buil_Partial define:BUILD_ALL false
 setting Buil_Partial define:HAVE_GRAPHIC_EQUALIZER_ONLY true
 setting Buil_Partial define:HAVE_LOADER_ONLY false
+setting Buil_Partial piperam true
+setting Buil_Partial retimer false
+setting Buil_Partial device xc2v1000
+setting Buil_Partial package fg456
+setting Buil_Partial speed 4
+setting Buil_Partial aluMapping false
+setting Buil_Partial define:__EDIF__ true
+setting Buil_Partial define:__VHDL__ false
+setting Buil_Partial define:__VERILOG__ false
+setting Buil_Partial include:..\\..\\project_cvs\\support_libs\\debug false
+setting Buil_Partial "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Buil_Partial "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Buil_Partial "cd Build_Partial"
 command Buil_Partial "call edifmake_rc200_optimized Graphic_Equalizer"
 output Buil_Partial bin\\Graphic_Equalizer.bit
@@ -819,10 +909,257 @@ setting Shutdown_Releasebuild include:data true
 setting Shutdown_Releasebuild define:BUILD_ALL false
 setting Shutdown_Releasebuild define:HAVE_LOADER_ONLY false
 setting Shutdown_Releasebuild define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting Shutdown_Releasebuild piperam true
+setting Shutdown_Releasebuild retimer false
+setting Shutdown_Releasebuild device none
+setting Shutdown_Releasebuild package none
+setting Shutdown_Releasebuild speed none
+setting Shutdown_Releasebuild aluMapping false
+setting Shutdown_Releasebuild define:__EDIF__ true
+setting Shutdown_Releasebuild define:__VHDL__ false
+setting Shutdown_Releasebuild define:__VERILOG__ false
+setting Shutdown_Releasebuild include:..\\..\\project_cvs\\support_libs\\debug false
+setting Shutdown_Releasebuild "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting Shutdown_Releasebuild "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
 command Shutdown_Releasebuild "cd Shutdown"
 command Shutdown_Releasebuild "call edifmake_rc200_optimized Graphic_Equalizer"
 command Shutdown_Releasebuild "call c:\\shutdownnow.bat"
 output Shutdown_Releasebuild bin\\Graphic_Equalizer.bit
+setting RC203E_Full_Debug debug true
+setting RC203E_Full_Debug warnings true
+setting RC203E_Full_Debug parfunc false
+setting RC203E_Full_Debug parchan false
+setting RC203E_Full_Debug parmem false
+setting RC203E_Full_Debug rewrite true
+setting RC203E_Full_Debug high true
+setting RC203E_Full_Debug cse true
+setting RC203E_Full_Debug pcse true
+setting RC203E_Full_Debug rcse true
+setting RC203E_Full_Debug cr true
+setting RC203E_Full_Debug rcr true
+setting RC203E_Full_Debug browse true
+setting RC203E_Full_Debug estimate false
+setting RC203E_Full_Debug noTimeCon false
+setting RC203E_Full_Debug ignoreInclDirs false
+setting RC203E_Full_Debug ignoreLibDirs false
+setting RC203E_Full_Debug noFastCarry false
+setting RC203E_Full_Debug mapper true
+setting RC203E_Full_Debug netlistSimulator false
+setting RC203E_Full_Debug useCustomBuild false
+setting RC203E_Full_Debug exclude false
+setting RC203E_Full_Debug target edif
+setting RC203E_Full_Debug target.compile none
+setting RC203E_Full_Debug family XilinxVirtexII
+setting RC203E_Full_Debug family.lib none
+setting RC203E_Full_Debug vTool Generic
+setting RC203E_Full_Debug netExp area
+setting RC203E_Full_Debug outDir Full_Debug
+setting RC203E_Full_Debug intDir Full_Debug
+setting RC203E_Full_Debug part xc2v3000fg676-4
+setting RC203E_Full_Debug define:NDEBUG true
+setting RC203E_Full_Debug define:USE_ true
+setting RC203E_Full_Debug define:USE_RC200E false
+setting RC203E_Full_Debug "include:C:\\Program Files\\celoxica\\pdk\\hardware\\include" true
+setting RC203E_Full_Debug include:include true
+setting RC203E_Full_Debug include:..\\Support_Libs\\debug true
+setting RC203E_Full_Debug lib:stdlib.hcl true
+setting RC203E_Full_Debug lib:rc200e.hcl false
+setting RC203E_Full_Debug lib:pal_rc200e.hcl false
+setting RC203E_Full_Debug "libdir:C:\\Program Files\\celoxica\\pdk\\hardware\\lib" true
+setting RC203E_Full_Debug define:HANDELCV3 false
+setting RC203E_Full_Debug define:SIMULATE false
+setting RC203E_Full_Debug define:DEBUG false
+setting RC203E_Full_Debug define:USE_RC100 false
+setting RC203E_Full_Debug define:NSIMULATE false
+setting RC203E_Full_Debug define:USE_SIM false
+setting RC203E_Full_Debug define:USE_ADMXRC2 false
+setting RC203E_Full_Debug define:USE_NIOS false
+setting RC203E_Full_Debug define:USE_NDB false
+setting RC203E_Full_Debug define:USE_RC1000 false
+setting RC203E_Full_Debug define:USE_RC200 false
+setting RC203E_Full_Debug define:USE_ARMSTRIPE false
+setting RC203E_Full_Debug define:USE_EDB false
+setting RC203E_Full_Debug define:USE_V2PRO false
+setting RC203E_Full_Debug define:USE_MV2P false
+setting RC203E_Full_Debug define:RC200 false
+setting RC203E_Full_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting RC203E_Full_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\includes" false
+setting RC203E_Full_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\" false
+setting RC203E_Full_Debug include:..\\..\\..\\include false
+setting RC203E_Full_Debug include:C:\\Project_CVS\\Support_Libs\\debug false
+setting RC203E_Full_Debug lib:rc100.hcl false
+setting RC203E_Full_Debug lib:pal_rc100.hcl false
+setting RC203E_Full_Debug lib:pal_framebuffer16.hcl false
+setting RC203E_Full_Debug lib:sim.hcl false
+setting RC203E_Full_Debug lib:pal_sim.hcl false
+setting RC203E_Full_Debug lib:admxrc2.hcl false
+setting RC203E_Full_Debug lib:pal_admxrc2.hcl false
+setting RC203E_Full_Debug lib:pal_console.hcl false
+setting RC203E_Full_Debug lib:ndb.hcl false
+setting RC203E_Full_Debug lib:pal_ndb.hcl false
+setting RC203E_Full_Debug lib:rc1000.hcl false
+setting RC203E_Full_Debug lib:pal_rc1000.hcl false
+setting RC203E_Full_Debug lib:rc200.hcl false
+setting RC203E_Full_Debug lib:pal_rc200.hcl false
+setting RC203E_Full_Debug lib:pal_keyboard.hcl false
+setting RC203E_Full_Debug lib:pal_framebuffer8.hcl false
+setting RC203E_Full_Debug lib:pal_framebufferdb.hcl false
+setting RC203E_Full_Debug lib:edb.hcl false
+setting RC203E_Full_Debug lib:pal_edb.hcl false
+setting RC203E_Full_Debug lib:mv2p.hcl false
+setting RC203E_Full_Debug lib:pal_mv2p.hcl false
+setting RC203E_Full_Debug lib:pal_mouse.hcl false
+setting RC203E_Full_Debug "lib:C:\\Program Files\\Celoxica\\PDK\\Hardware\\Lib\\stdlib.hcl" false
+setting RC203E_Full_Debug "libdir:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\lib" false
+setting RC203E_Full_Debug ansimodules:..\\..\\..\\Software\\Lib\\PalSim.lib false
+setting RC203E_Full_Debug define:HAVE_DEBUG true
+setting RC203E_Full_Debug include:..\\..\\Support_Libs\\debug false
+setting RC203E_Full_Debug define:HAVE_SMARTMEDIA true
+setting RC203E_Full_Debug define:USE_RUNFFT true
+setting RC203E_Full_Debug define:HARDWARE_MULTIPLY true
+setting RC203E_Full_Debug define:PERFORM_FFT_CALCULATION true
+setting RC203E_Full_Debug define:USE_UNSIGNED_AUDIO false
+setting RC203E_Full_Debug define:_CONFIGURATION_HCH true
+setting RC203E_Full_Debug include:data true
+setting RC203E_Full_Debug define:BUILD_ALL false
+setting RC203E_Full_Debug define:HAVE_LOADER_ONLY false
+setting RC203E_Full_Debug define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting RC203E_Full_Debug piperam true
+setting RC203E_Full_Debug retimer false
+setting RC203E_Full_Debug device xc2v3000
+setting RC203E_Full_Debug package fg676
+setting RC203E_Full_Debug speed 4
+setting RC203E_Full_Debug aluMapping false
+setting RC203E_Full_Debug define:__EDIF__ true
+setting RC203E_Full_Debug define:__VHDL__ false
+setting RC203E_Full_Debug define:__VERILOG__ false
+setting RC203E_Full_Debug include:..\\..\\project_cvs\\support_libs\\debug false
+setting RC203E_Full_Debug "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting RC203E_Full_Debug aluValue ""
+setting RC203E_Full_Debug "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
+setting RC203E_Full_Debug define:USE_RC203E true
+setting RC203E_Full_Debug lib:rc203e.hcl true
+setting RC203E_Full_Debug lib:pal_rc203e.hcl true
+command RC203E_Full_Debug "cd Full_Debug"
+command RC203E_Full_Debug "call edifmake_rc200_unoptimized Graphic_Equalizer"
+output RC203E_Full_Debug bin\\Graphic_Equalizer.bit
+setting RC203E_FastLoad_Debug debug true
+setting RC203E_FastLoad_Debug warnings true
+setting RC203E_FastLoad_Debug parfunc false
+setting RC203E_FastLoad_Debug parchan false
+setting RC203E_FastLoad_Debug parmem false
+setting RC203E_FastLoad_Debug rewrite true
+setting RC203E_FastLoad_Debug high true
+setting RC203E_FastLoad_Debug cse true
+setting RC203E_FastLoad_Debug pcse true
+setting RC203E_FastLoad_Debug rcse true
+setting RC203E_FastLoad_Debug cr true
+setting RC203E_FastLoad_Debug rcr true
+setting RC203E_FastLoad_Debug browse true
+setting RC203E_FastLoad_Debug estimate false
+setting RC203E_FastLoad_Debug noTimeCon false
+setting RC203E_FastLoad_Debug ignoreInclDirs false
+setting RC203E_FastLoad_Debug ignoreLibDirs false
+setting RC203E_FastLoad_Debug noFastCarry false
+setting RC203E_FastLoad_Debug mapper true
+setting RC203E_FastLoad_Debug netlistSimulator false
+setting RC203E_FastLoad_Debug useCustomBuild false
+setting RC203E_FastLoad_Debug exclude false
+setting RC203E_FastLoad_Debug target edif
+setting RC203E_FastLoad_Debug target.compile none
+setting RC203E_FastLoad_Debug family XilinxVirtexII
+setting RC203E_FastLoad_Debug family.lib none
+setting RC203E_FastLoad_Debug vTool Generic
+setting RC203E_FastLoad_Debug netExp speed
+setting RC203E_FastLoad_Debug outDir FastLoad_Debug
+setting RC203E_FastLoad_Debug intDir FastLoad_Debug
+setting RC203E_FastLoad_Debug part xc2v3000fg676-4
+setting RC203E_FastLoad_Debug define:NDEBUG true
+setting RC203E_FastLoad_Debug define:HANDELCV3 false
+setting RC203E_FastLoad_Debug define:SIMULATE false
+setting RC203E_FastLoad_Debug define:DEBUG false
+setting RC203E_FastLoad_Debug define:USE_ true
+setting RC203E_FastLoad_Debug define:USE_RC100 false
+setting RC203E_FastLoad_Debug define:NSIMULATE false
+setting RC203E_FastLoad_Debug define:USE_SIM false
+setting RC203E_FastLoad_Debug define:USE_ADMXRC2 false
+setting RC203E_FastLoad_Debug define:USE_NIOS false
+setting RC203E_FastLoad_Debug define:USE_NDB false
+setting RC203E_FastLoad_Debug define:USE_RC1000 false
+setting RC203E_FastLoad_Debug define:USE_RC200 false
+setting RC203E_FastLoad_Debug define:USE_RC200E false
+setting RC203E_FastLoad_Debug define:USE_ARMSTRIPE false
+setting RC203E_FastLoad_Debug define:USE_EDB false
+setting RC203E_FastLoad_Debug define:USE_V2PRO false
+setting RC203E_FastLoad_Debug define:USE_MV2P false
+setting RC203E_FastLoad_Debug define:RC200 false
+setting RC203E_FastLoad_Debug lib:stdlib.hcl true
+setting RC203E_FastLoad_Debug lib:rc100.hcl false
+setting RC203E_FastLoad_Debug lib:pal_rc100.hcl false
+setting RC203E_FastLoad_Debug lib:pal_framebuffer16.hcl false
+setting RC203E_FastLoad_Debug lib:sim.hcl false
+setting RC203E_FastLoad_Debug lib:pal_sim.hcl false
+setting RC203E_FastLoad_Debug lib:admxrc2.hcl false
+setting RC203E_FastLoad_Debug lib:pal_admxrc2.hcl false
+setting RC203E_FastLoad_Debug lib:pal_console.hcl false
+setting RC203E_FastLoad_Debug lib:ndb.hcl false
+setting RC203E_FastLoad_Debug lib:pal_ndb.hcl false
+setting RC203E_FastLoad_Debug lib:rc1000.hcl false
+setting RC203E_FastLoad_Debug lib:pal_rc1000.hcl false
+setting RC203E_FastLoad_Debug lib:rc200.hcl false
+setting RC203E_FastLoad_Debug lib:pal_rc200.hcl false
+setting RC203E_FastLoad_Debug lib:rc200e.hcl false
+setting RC203E_FastLoad_Debug lib:pal_rc200e.hcl false
+setting RC203E_FastLoad_Debug lib:pal_keyboard.hcl false
+setting RC203E_FastLoad_Debug lib:pal_framebuffer8.hcl false
+setting RC203E_FastLoad_Debug lib:pal_framebufferdb.hcl false
+setting RC203E_FastLoad_Debug lib:edb.hcl false
+setting RC203E_FastLoad_Debug lib:pal_edb.hcl false
+setting RC203E_FastLoad_Debug lib:mv2p.hcl false
+setting RC203E_FastLoad_Debug lib:pal_mv2p.hcl false
+setting RC203E_FastLoad_Debug lib:pal_mouse.hcl false
+setting RC203E_FastLoad_Debug ansimodules:..\\..\\..\\Software\\Lib\\PalSim.lib false
+setting RC203E_FastLoad_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting RC203E_FastLoad_Debug "libdir:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\lib" false
+setting RC203E_FastLoad_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\includes" false
+setting RC203E_FastLoad_Debug "include:R:\\c2hardw\\Program Files\\celoxica\\pdk\\hardware\\" false
+setting RC203E_FastLoad_Debug include:..\\..\\..\\include false
+setting RC203E_FastLoad_Debug include:include true
+setting RC203E_FastLoad_Debug include:..\\Support_Libs\\debug true
+setting RC203E_FastLoad_Debug include:C:\\Project_CVS\\Support_Libs\\debug false
+setting RC203E_FastLoad_Debug "lib:C:\\Program Files\\Celoxica\\PDK\\Hardware\\Lib\\stdlib.hcl" false
+setting RC203E_FastLoad_Debug "include:C:\\Program Files\\celoxica\\pdk\\hardware\\include" true
+setting RC203E_FastLoad_Debug "libdir:C:\\Program Files\\celoxica\\pdk\\hardware\\lib" true
+setting RC203E_FastLoad_Debug define:HAVE_DEBUG true
+setting RC203E_FastLoad_Debug define:HAVE_SMARTMEDIA false
+setting RC203E_FastLoad_Debug define:USE_RUNFFT true
+setting RC203E_FastLoad_Debug define:HARDWARE_MULTIPLY true
+setting RC203E_FastLoad_Debug define:PERFORM_FFT_CALCULATION true
+setting RC203E_FastLoad_Debug define:USE_UNSIGNED_AUDIO false
+setting RC203E_FastLoad_Debug include:..\\..\\Support_Libs\\debug false
+setting RC203E_FastLoad_Debug define:_CONFIGURATION_HCH true
+setting RC203E_FastLoad_Debug include:data true
+setting RC203E_FastLoad_Debug define:BUILD_ALL false
+setting RC203E_FastLoad_Debug define:HAVE_LOADER_ONLY false
+setting RC203E_FastLoad_Debug define:HAVE_GRAPHIC_EQUALIZER_ONLY false
+setting RC203E_FastLoad_Debug piperam true
+setting RC203E_FastLoad_Debug retimer false
+setting RC203E_FastLoad_Debug device xc2v3000
+setting RC203E_FastLoad_Debug package fg676
+setting RC203E_FastLoad_Debug speed 4
+setting RC203E_FastLoad_Debug aluMapping false
+setting RC203E_FastLoad_Debug define:__EDIF__ true
+setting RC203E_FastLoad_Debug define:__VHDL__ false
+setting RC203E_FastLoad_Debug define:__VERILOG__ false
+setting RC203E_FastLoad_Debug include:..\\..\\project_cvs\\support_libs\\debug false
+setting RC203E_FastLoad_Debug "include:c:\\Program Files\\celoxica\\pdk\\hardware\\include" false
+setting RC203E_FastLoad_Debug "lib:..\\..\\program files\\celoxica\\pdk\\hardware\\lib\\pal_console.hcl" false
+setting RC203E_FastLoad_Debug define:USE_RC203E true
+setting RC203E_FastLoad_Debug lib:rc203e.hcl true
+setting RC203E_FastLoad_Debug lib:pal_rc203e.hcl true
+command RC203E_FastLoad_Debug "cd FastLoad_Debug"
+command RC203E_FastLoad_Debug "call edifmake_rc200_unoptimized Graphic_Equalizer"
+output RC203E_FastLoad_Debug bin\\Graphic_Equalizer.bit
 document include\\audio.hch {
     type hch
 }