diff options
Diffstat (limited to 'linux-2.4.x/drivers/mtd/nand/spia.c')
-rw-r--r-- | linux-2.4.x/drivers/mtd/nand/spia.c | 99 |
1 files changed, 56 insertions, 43 deletions
diff --git a/linux-2.4.x/drivers/mtd/nand/spia.c b/linux-2.4.x/drivers/mtd/nand/spia.c index df2f7bc..32541cb 100644 --- a/linux-2.4.x/drivers/mtd/nand/spia.c +++ b/linux-2.4.x/drivers/mtd/nand/spia.c @@ -1,9 +1,14 @@ /* * drivers/mtd/nand/spia.c * - * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com) + * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) * - * $Id: spia.c,v 1.12 2001/10/02 15:05:14 dwmw2 Exp $ + * + * 10-29-2001 TG change to support hardwarespecific access + * to controllines (due to change in nand.c) + * page_cache added + * + * $Id: spia.c,v 1.25 2005/11/07 11:14:31 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -15,6 +20,8 @@ * a 64Mibit (8MiB x 8 bits) NAND flash device. */ +#include <linux/kernel.h> +#include <linux/init.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/mtd/mtd.h> @@ -30,14 +37,14 @@ static struct mtd_info *spia_mtd = NULL; /* * Values specific to the SPIA board (used with EP7212 processor) */ -#define SPIA_IO_ADDR = 0xd0000000 /* Start of EP7212 IO address space */ -#define SPIA_FIO_ADDR = 0xf0000000 /* Address where flash is mapped */ -#define SPIA_PEDR = 0x0080 /* +#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ +#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ +#define SPIA_PEDR 0x0080 /* * IO offset to Port E data register * where the CLE, ALE and NCE pins * are wired to. */ -#define SPIA_PEDDR = 0x00c0 /* +#define SPIA_PEDDR 0x00c0 /* * IO offset to Port E data direction * register so we can control the IO * lines. @@ -52,29 +59,47 @@ static int spia_fio_base = SPIA_FIO_BASE; static int spia_pedr = SPIA_PEDR; static int spia_peddr = SPIA_PEDDR; -MODULE_PARM(spia_io_base, "i"); -MODULE_PARM(spia_fio_base, "i"); -MODULE_PARM(spia_pedr, "i"); -MODULE_PARM(spia_peddr, "i"); - -__setup("spia_io_base=",spia_io_base); -__setup("spia_fio_base=",spia_fio_base); -__setup("spia_pedr=",spia_pedr); -__setup("spia_peddr=",spia_peddr); +module_param(spia_io_base, int, 0); +module_param(spia_fio_base, int, 0); +module_param(spia_pedr, int, 0); +module_param(spia_peddr, int, 0); /* * Define partitions for flash device */ const static struct mtd_partition partition_info[] = { - { name: "SPIA flash partition 1", - offset: 0, - size: 2*1024*1024 }, - { name: "SPIA flash partition 2", - offset: 2*1024*1024, - size: 6*1024*1024 } + { + .name = "SPIA flash partition 1", + .offset = 0, + .size = 2*1024*1024 + }, + { + .name = "SPIA flash partition 2", + .offset = 2*1024*1024, + .size = 6*1024*1024 + } }; #define NUM_PARTITIONS 2 + +/* + * hardware specific access to control-lines +*/ +static void spia_hwcontrol(struct mtd_info *mtd, int cmd){ + + switch(cmd){ + + case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break; + case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break; + + case NAND_CTL_SETALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x02; break; + case NAND_CTL_CLRALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x02; break; + + case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break; + case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break; + } +} + /* * Main initialization routine */ @@ -107,26 +132,19 @@ int __init spia_init (void) (*(volatile unsigned char *) (spia_io_base + spia_peddr)) = 0x07; /* Set address of NAND IO lines */ - this->IO_ADDR = spia_fio_base; - this->CTRL_ADDR = spia_io_base + spia_pedr; - this->CLE = 0x01; - this->ALE = 0x02; - this->NCE = 0x04; + this->IO_ADDR_R = (void __iomem *) spia_fio_base; + this->IO_ADDR_W = (void __iomem *) spia_fio_base; + /* Set address of hardware control function */ + this->hwcontrol = spia_hwcontrol; + /* 15 us command delay time */ + this->chip_delay = 15; /* Scan to find existence of the device */ - if (nand_scan (spia_mtd)) { + if (nand_scan (spia_mtd, 1)) { kfree (spia_mtd); return -ENXIO; } - /* Allocate memory for internal data buffer */ - this->data_buf = kmalloc (sizeof(u_char) * (spia_mtd->oobblock + spia_mtd->oobsize), GFP_KERNEL); - if (!this->data_buf) { - printk ("Unable to allocate NAND data buffer for SPIA.\n"); - kfree (spia_mtd); - return -ENOMEM; - } - /* Register the partitions */ add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS); @@ -141,13 +159,8 @@ module_init(spia_init); #ifdef MODULE static void __exit spia_cleanup (void) { - struct nand_chip *this = (struct nand_chip *) &spia_mtd[1]; - - /* Unregister the device */ - del_mtd_device (spia_mtd); - - /* Free internal data buffer */ - kfree (this->data_buf); + /* Release resources, unregister device */ + nand_release (spia_mtd); /* Free the MTD device structure */ kfree (spia_mtd); @@ -156,5 +169,5 @@ module_exit(spia_cleanup); #endif MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Steven J. Hill <sjhill@cotw.com"); +MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board"); |